ARM Cortex-A9

Samsung Exynos 4210: Cortex-A9 dual core, 1200 MHz, 2-ports 32-bit 800Mbps LPDDR2/DDR2/DDR3 (6.4GB/s).

4 KB pages mode

Size Latency Description
32 K 4 TLB + L1
64 K 23 + 19 (L2)
128 K
256 K 30 + 7 (L1 TLB miss)
512 K
1 M 37 + 7 (L2 TLB miss)
... 37 + 110 ns + 110 ns (RAM)

Data prefetcher monitors only RAM misses. It doesn't prefetch data from L2 cache.

Pipeline

Integer pipeline:

# Name Stage
1 Fe1 Fetch
2 Fe2
3 Fe3
4 De1 Decode
5 De2
6 Re Rename
7 Iss Issue
8 Ex Execute
9 WB WriteBack

Links

ARM Cortex-A9 at Wikipedia

ARM Cortex-A9 at arm.com