Intel P6 (Pentium II, Pentium III)

Intel Pentium III-S

Intel Pentium III-S 1400 Mhz (133 * 10.5), Tualatin (130 nm), FSB 133 MHz, 32.2W, dual CPU motherboard, ServerWorks ServerSet III LE, 3 x 1 GB PC133 ECC CL3.

4 KB pages mode

Size Latency Description
16 K 3 TLB + L1
256 K 8 +5 (L2)
512 K 13 +5 (TLB miss -> L1 cache)
8 M 13 + 140 ns + RAM
~128 M 21 + 140 ns +3 (PDE cache miss) + 5 (TLB miss -> L2 cache)
... 21 + 280 ns + RAM (TLB miss -> RAM)

4 MB pages mode

Size Latency Description
16 K 3 TLB + L1
512 K 8 +5 (L2)
32 M 8 + 140 ns + RAM
... 14 + 140 ns +6 (TLB miss)

Intel Celeron (Tualatin)

Intel Celeron 1200 MHz (100*12), Tualatin (130 nm), SDRAM PC-100 2-2-2-5-7.

4 KB pages mode

Size Latency Description
16 K 3 TLB + L1
256 K 8 +5 (L2)
8 M 13 + 150 ns +5 (TLB miss) + RAM
~64 M 21 + 150 ns +3 (PDE cache miss) + 5 (TLB miss -> L2 cache)
... 21 + 300 ns + RAM (TLB miss -> RAM)

4 MB pages mode

Size Latency Description
16 K 3 TLB + L1
256 K 8 +5 (L2)
32 M 8 + 150 ns + RAM
... 14 + 150 ns +6 (TLB miss)

Pentium II

Dual Pentium II 350 Mhz (100*3.5), Deschutes (250 nm), core: 113 mm2. L2 512 KB @ 175MT/s.

4 KB pages, Linux

  Size        Latency       Increase   Description

  16 K     3
  32 K    13              10           + 19 (L1 cache miss)
  64 K    18               5
 128 K    20               2            
 256 K    22               2
 512 K    25               3           + 5 (TLB miss)
   1 M    26 +  70 ns      1 + 70 ns   + 140 ns (RAM)
   2 M    27 + 105 ns      1 + 35 ns
   4 M    27 + 123 ns          18 ns
   8 M    32 + 137 ns      5 + 14 ns   + 19 (Page walk to L2 cache) ?
  16 M    38 + 160 ns      6 + 23 ns   + 3 (PDE cache miss) 
  32 M    44 + 172 ns      6 + 12 ns
  64 M    47 + 175 ns      3    3 ns
 128 M    49 + 175 ns      2   

Pipeline

Branch misprediction penalty = 9 cycles.

# In-Order Out-of-Order
1 ICache
2 ILD
3 Decode1/Rotate
4 Decode2
5 Decode3
6H RAT
6L
ROB Write? RS Psrc/Pdsts write
7H ROB/RRF read Ready: RS Pdst-CAM match
7L RS data write
RS Shedule
RS Pdst read
8H RS data Read
8L ByPass
9H Execute
9L RS/ROB writeback
10H Retire-ROB Read
10L Ip -1
11H Ip -2
11L Retire-RRF Write